The invention relates to CMOS circuitry, and more particularly to circuitry for eliminating shoot-through currents in complementary output stages of CMOS circuitry, and still more particularly to preventing shoot-through currents during switching of output stages of CMOS comparators.
The output stages of CMOS comparators usually are designed using a complementary CMOS inverter having large pull-up transistors and large pull-down transistors. See the paper “A 1Mv Resolution, 10Ms/s Rail-to-Rail Comparator in 0.5 μm Low-Voltage CMOS Process”, by R. Rivoir and F. Maloberti, ISCAS-97, pages 461-464. The input voltage of the CMOS inverter changes relatively slowly during switching because the rise times and fall times thereof are limited by the amount of current which can be supplied from the previous input stage to charge and discharge the large gate capacitances of the pull-up and pull-down transistors of the CMOS inverter. Consequently, there is a relatively large amount of time during which both the pull-up transistors and the pull-down transistors are simultaneously on. This causes large “shoot-through” currents to flow from the positive voltage supply rail through the simultaneously on pull-up and pull-down transistors to the negative voltage supply rail. The large shoot-through current increases the current consumption of the CMOS comparator circuit, which is especially significant for low-power CMOS comparators being operated at high switching speeds. The large shoot-through currents also generate noise and EMI that may adversely affect other circuitry that is coupled to the CMOS comparator. Large shoot-through currents in CMOS circuits also may cause undesirable noise in power line conductors supplying power to the CMOS circuits.
Some prior art circuits utilize non-overlapping drivers circuits to drive the gates of the P-channel pull-up transistor and the N-channel pull-down transistor so as to prevent shoot-through currents, as shown in FIG. 9 of “Analog VLSI Design of Multi-Phase Voltage Doublers with Frequency Regulation” by Fengjing Aiu, Janusz A. Starzyk and Ying-Wei January, 1999 Southwest Symposium on Mixed-Signal Design, pages 9-14. Other prior art circuits operate to provide a “dead time” between the switching off of one of the pull-up and pull-down transistors and the switching on of the other.
For a long time there has been an unmet need for a simple, effective, inexpensive way of preventing shoot-through current in CMOS circuitry, especially CMOS comparators.